In maestro view, Simulation Files, then add to definition file your_file.txt
The file content:
simulator lang = spectre save so_* exclude=[*:*_so_* *other net"]
In maestro view, Simulation Files, then add to definition file your_file.txt
The file content:
simulator lang = spectre save so_* exclude=[*:*_so_* *other net"]
At some point I needed to have an ideal Verilog-A BPSK modulator:
