At some point I needed to have an ideal Verilog-A BPSK modulator:
BPSK modulator model
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Below is the procedure of a PWM veriloga controller created in Verilog-A language (behavioral description language)
So, I need a PWM controller which is basically the block the duty cycle of which will vary in dependence of the control pin voltage. The previous picture shows the output of the controller (red) with input applied control voltage (green). The frequency is constant.
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